Browse Prior Art Database

Solderless Interconnection Substrate

IP.com Disclosure Number: IPCOM000049672D
Original Publication Date: 1982-Jul-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Gow, J: AUTHOR [+2]

Abstract

In the manufacture of substrates for mounting integrated circuit chips by the so-called flip-chip bonding technique, it is necessary to provide solder pads on the surface of the substrate to which the solder balls of the chips can be connected.

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Solderless Interconnection Substrate

In the manufacture of substrates for mounting integrated circuit chips by the so-called flip-chip bonding technique, it is necessary to provide solder pads on the surface of the substrate to which the solder balls of the chips can be connected.

In one technique, Cr-Cu-Cr metallization is utilized on the surface and pads are formed for soldering by removing the top layer of Cr, which is solder incompatible, and applying a Pb/Sn solder metal to the underlying copper where the Cr has been removed. However, the Pb/Sn pads have drawbacks. There can be bridging between lines.

It has been found that electroless immersion plated gold applied to the copper, rather than Pb/Sn solder, provides a good pad for adhering to the solder balls on the face of the chip and does not have the drawbacks of the of the Pb/Sn solder coating. The figure shows a structure where gold is used on a dual level metallized ceramic substrate. On the left side of the figure, two levels of metallization are depicted and designated by the reference character
A. This represents conventional two level metallization. The upper level metallization contacts the lower level metallization, both of which are Cr-Cu-Cr layers with a portion of the top layer of Cr of the lower level metallization removed to provide good contact between the two levels. Just the lower level of metallization is shown at B.

Shown at C are two levels of metallization similar to that at A but with...