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Selective Instruction, Selective Error Injection

IP.com Disclosure Number: IPCOM000049779D
Original Publication Date: 1982-Jul-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 2 page(s) / 24K

Publishing Venue

IBM

Related People

Celtruda, JO: AUTHOR [+3]

Abstract

A bit 10 in an error register 14 is used to degate an error from causing an interrupt. The error register is loaded with the error you wish to test for, and a binary "1" is written into degate bit 10. The number of local instructions to be performed before allowing an error you wish to test for is loaded into instruction counter 12. When the counter counts down that number of instructions, AND gate 16 allows the error to cause an interrupt.

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Selective Instruction, Selective Error Injection

A bit 10 in an error register 14 is used to degate an error from causing an interrupt. The error register is loaded with the error you wish to test for, and a binary "1" is written into degate bit 10. The number of local instructions to be performed before allowing an error you wish to test for is loaded into instruction counter 12. When the counter counts down that number of instructions, AND gate 16 allows the error to cause an interrupt.

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