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Simultaneous Data Operations on a Single Burst Transfer Channel

IP.com Disclosure Number: IPCOM000049788D
Original Publication Date: 1982-Jul-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 3 page(s) / 80K

Publishing Venue

IBM

Related People

Hinkel, SW: AUTHOR [+2]

Abstract

Some computer systems have a lock-out arrangement whereby only one input/output (I/O) device can be commanded at a time to operate in burst mode. Some I/O devices operating in burst mode have a relatively long latency period. i.e., the time necessary to prepare or accept data during a data transfer operation. Hence, when a data transfer command is issued to an I/O device having a relatively long latency period, it blocks out all other I/O devices from burst transfer and system performance degrades. It has been determined that, by providing proper communication between the I/O devices themselves when operating in a burst mode, the lockout can be eliminated whereby two I/O devices capable of operating in burst mode can be issued commands simultaneously.

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Simultaneous Data Operations on a Single Burst Transfer Channel

Some computer systems have a lock-out arrangement whereby only one input/output (I/O) device can be commanded at a time to operate in burst mode. Some I/O devices operating in burst mode have a relatively long latency period.
i.e., the time necessary to prepare or accept data during a data transfer operation. Hence, when a data transfer command is issued to an I/O device having a relatively long latency period, it blocks out all other I/O devices from burst transfer and system performance degrades. It has been determined that, by providing proper communication between the I/O devices themselves when operating in a burst mode, the lockout can be eliminated whereby two I/O devices capable of operating in burst mode can be issued commands simultaneously. In this particular instance the I/O device with the greatest latency also has the least buffering and it must communicate to the other I/O device, transferring data in burst mode to terminate its data transfer when the latency period has expired and it is ready to transfer data. This communication must be early enough to allow the other I/O device transferring data in burst mode to terminate the transfer properly.

In Fig. 1, disk 10 and diskette 50 are operable to transfer data in burst mode. Burst mode data transferring is described in the IBM Technical Disclosure Bulletin 17, 2992-3001 (March 1975). Disk 10 and diskette 50 are attached to data bus in (DBI) 80 and data bus out (DBO) 90 via attachments 20 and 60, respectively. When either disk 10 or diskette 50 is issued an I/O command to transfer dats in burst mode, it activates a block processor clock signal on line 95.

The I/O commands to the disk 10 and diskette 50 are entered into command registers 21 and 61, respectively (Fig. 2). The commands are decoded, and, in this instance, there are simultaneous read commands. The read commands condition AND circuits 22 and 62, respectively. The data read by the disk and diskette is transmitted over lines 23 and 63 via AND circuits 25 and 65 into buffers 26 and 66, respectively. It should be recognized that the data from disk 10 enters buffer 26 quicker than data from diskette 50 enters buffer 66 because t...