Browse Prior Art Database

Wiring of a Two Read Only Storage Chip Module

IP.com Disclosure Number: IPCOM000049905D
Original Publication Date: 1982-Aug-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 2 page(s) / 27K

Publishing Venue

IBM

Related People

Coelho, F: AUTHOR [+4]

Abstract

Two read-only storage (ROS) chips are interconnected on one module in order to increase module capacity. The existing R0S personalization program is used to change the output pad attributes to realize a low cost large capacity ROS module.

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Wiring of a Two Read Only Storage Chip Module

Two read-only storage (ROS) chips are interconnected on one module in order to increase module capacity. The existing R0S personalization program is used to change the output pad attributes to realize a low cost large capacity ROS module.

To build a module with two ROS chips, the outputs of the chips have to be dotted. The dotting of the outputs is realized on a multi-chip module with only one metallization level.

Advantage is taken of the ROS personalization program to invert the definition of the outputs of one of the two chips. Thus, the wiring is performed as shown on the drawing.

Thus, the substrate is easily wired on a single layer ceramic, which decreases the cost and the complexity of the module. The mirroring program is completely transparent to the user who describes his personalization in the usual manner.

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