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Pulse Width Modulator

IP.com Disclosure Number: IPCOM000049934D
Original Publication Date: 1982-Aug-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 2 page(s) / 46K

Publishing Venue

IBM

Related People

Driscoll, CD: AUTHOR

Abstract

Briefly, this article describes a pulse-width modulator circuit for use in switching power supplies. The circuit establishes a maximum duty cycle which cannot be exceeded regardless of the error voltage and lends itself to the implementation of an output current limiting function. The circuit is shown in detail in Fig. 1. A 555 timer circuit is driven by a single source of bias voltage V(bias) through resistors 10 and 12 and a capacitor 14. The square-wave clock pulses (Fig. 2) produced by the clock circuit are applied to an integrating capacitor 16, one input of a NAND gate 18 in a latch circuit 20 and to one input of an output NAND gate 22. The voltage across integrating capacitor 16 is applied to the minus input of a comparator amplifier 24.

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Pulse Width Modulator

Briefly, this article describes a pulse-width modulator circuit for use in switching power supplies. The circuit establishes a maximum duty cycle which cannot be exceeded regardless of the error voltage and lends itself to the implementation of an output current limiting function. The circuit is shown in detail in Fig. 1. A 555 timer circuit is driven by a single source of bias voltage V(bias) through resistors 10 and 12 and a capacitor 14. The square-wave clock pulses (Fig. 2) produced by the clock circuit are applied to an integrating capacitor 16, one input of a NAND gate 18 in a latch circuit 20 and to one input of an output NAND gate 22. The voltage across integrating capacitor 16 is applied to the minus input of a comparator amplifier 24. An error voltage from the switching power supply is applied to the plus input of comparator amplifier 24. The output of amplifier 24 provides one input to a NAND gate 26 in the latch circuit 20. Comparator amplifier 24 is connected in parallel with a similar amplifier 28 in a current limiting circuit. The inputs to amplifier 28 are provided by a reference voltage source V (ref) and a current sensing element which provides a voltage proportional to the output current from the switching power supply.

Referring to Fig. 1, the latch 20 is set (its output goes low) each time the voltage across the integrating capacitor 16 exceeds the error voltage and is reset (its output goes high) at the falling edge of the pulse provided by the clock circuit. The result is a negative-going output pulse which starts at the rising edge of the clock pulse but which has a duty cycle which can never exceed the duty cycle of the clock. The duty cycle of the clock is controlled by the values of resistors 10 and 12 and...