Browse Prior Art Database

Beam Activated Via Defect Detection

IP.com Disclosure Number: IPCOM000049983D
Original Publication Date: 1982-Aug-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 3 page(s) / 57K

Publishing Venue

IBM

Related People

Bajorek, CH: AUTHOR [+2]

Abstract

In fabricating multilayer thin film chip carriers including interconnection structures for large computers, one fundamental requirement is that the photolithographically defined area, upon which the interconnection lines and vias are made, be large (e.g., 4x4 inches) in order to support a large number of silicon chips on the carrier. The large-area lithographic approach for fine lines and vias (

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Beam Activated Via Defect Detection

In fabricating multilayer thin film chip carriers including interconnection structures for large computers, one fundamental requirement is that the photolithographically defined area, upon which the interconnection lines and vias are made, be large (e.g., 4x4 inches) in order to support a large number of silicon chips on the carrier. The large-area lithographic approach for fine lines and vias (<l mil) demands the capability of defect detection and repair immediately after each layer of lines or vias is fabricated and before the start of the next layer to achieve a practical level of yield.

Several ideas have been proposed for detecting the defect for interconnecting lines such as the use of laser. E-beam or optical means to scan the line pattern of the hardware in order to compare the scanned images with the stored images. However, these techniques are not reliable for detecting defects for vias which, for example, could be unfilled during the electroplating process and therefore cause an open circuit.

This approach can be used to detect via defects by directing a beam at each and every via after the vias have been exposed and developed in the photoresist and the polyimide layers prior to electroplating. There are two approaches shown in Figs. 1 and 2. In Fig. 1, the carrier substrate 10 is in a plating bath 11 in container 12 with the electro-chemical parameters adjusted so that appreciable plating occurs only in a single via activated by the beam 14 where the beam can be a laser beam or an acoustic beam 14. Assuming that there are 40,000 vias 9 in resist 8 on the substrate 10 and in the activated via area the current density is of the order of 10 mA/cm/2/ and the background plating rate in nonactivated vias has a current density of 10/2/ -...