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Early Detection of Simultaneous Current Switching on Integrated Circuit Chips

IP.com Disclosure Number: IPCOM000050024D
Original Publication Date: 1982-Aug-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Parks, L: AUTHOR [+2]

Abstract

The number of signals leaving a chip within a prescribed time period is limited by the total current change within that time period. This number of signals may be referred to as the simultaneous switching constraint, and the time period as the window. The number of signal lines which may change and the time window are dependent upon the technology of the chip. The following method provides early indication of chips which exceed the simultaneous switching constraint.

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Early Detection of Simultaneous Current Switching on Integrated Circuit Chips

The number of signals leaving a chip within a prescribed time period is limited by the total current change within that time period. This number of signals may be referred to as the simultaneous switching constraint, and the time period as the window.

The number of signal lines which may change and the time window are dependent upon the technology of the chip. The following method provides early indication of chips which exceed the simultaneous switching constraint. In a typical system which propagates waveforms, a signal may be defined at an instant in time by one of the following eight values: SYMBOL MEANING

Z Zero

N One

S Stable

C Changing

R Rising

F Falling

U Unknown

X Illegal.

The waveform of a signal over a cycle is expressed as a concatenation of time periods and values. For example, OU2C 5.3S7C10 has the following meaning: TIME PERIOD MEANING

0 2 Unknown

2 5.3 Changing

5.3 7 Stable

7 10 Changing.

During a timing verification run, the waveforms of the inputs of the logic are propagated through the logic blocks, and based on delay and function, the waveform is altered. After the waveforms of the inputs to the chip have been propagated through the logic contained within the chip, the waveforms of the outputs of the chip are stored in a chip output file and tagged with the identity of the chip. When the timing verification run has completed the propagation of all signals through the logic, the file is sorted by chip. For each chip, all intervals...