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Preventing Formation of Parasitic Chrome Silicon Diode in Schottky Diode Caused by Overetching

IP.com Disclosure Number: IPCOM000050113D
Original Publication Date: 1982-Sep-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 63K

Publishing Venue

IBM

Related People

Carlson, W: AUTHOR [+4]

Abstract

A change in the process for fabricating a Schottky barrier diode (SBD) by substituting a 30-1 glycerated etch for the former 10-1 glycerated etch eliminates problems with a low V(F) and high leakage caused by the formation of a parasitic chrome silicon diode at the perimeter of the platinum silicide contact.

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Preventing Formation of Parasitic Chrome Silicon Diode in Schottky Diode Caused by Overetching

A change in the process for fabricating a Schottky barrier diode (SBD) by substituting a 30-1 glycerated etch for the former 10-1 glycerated etch eliminates problems with a low V(F) and high leakage caused by the formation of a parasitic chrome silicon diode at the perimeter of the platinum silicide contact.

As shown in the drawings, if etching is excessive (as shown by the dotted line), the recessed oxide isolation (ROI) layer is exposed to contact by the subsequently deposited Cr/Cr(2)O(3) layer to form a Cr/Si diode in parallel with the Schottky barrier diode, resulting in high leakage and low V(F), thus degrading the performance of the Schottky diode.

By the substitution of the 30-1 etchant, the ROI layer is not etched away at the perimeter of the PtSi contact so as to preserve the isolation of the Cr/Cr(2)O(3) from the silicon substrate, and thus eliminate the formation of the unwanted parasitic diode.

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