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Transmission Impedance Matching Device

IP.com Disclosure Number: IPCOM000050167D
Original Publication Date: 1982-Sep-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 3 page(s) / 41K

Publishing Venue

IBM

Related People

Foglia, HR: AUTHOR

Abstract

In many applications transmission facilities having different impedance characteristics must be concatenated in order to establish a signal path between a signal transmitter and a signal receiver. Conventional impedance matching transformers are inexpensive and effective for matching the impedances of the various segments of the path. However, they will not pass direct current (DC) and, therefore, cannot be used to effectively pass digital signals which have substantial DC components.

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Transmission Impedance Matching Device

In many applications transmission facilities having different impedance characteristics must be concatenated in order to establish a signal path between a signal transmitter and a signal receiver. Conventional impedance matching transformers are inexpensive and effective for matching the impedances of the various segments of the path. However, they will not pass direct current (DC) and, therefore, cannot be used to effectively pass digital signals which have substantial DC components.

This article describes an alternative matching device which is capable of passing DC and is therefore an acceptable substitute for the matching transformer. The alternative uses several stages of passive inductances (L) and capacitors (C) cascaded to form a lumped transmission line (Fig. 1). A balum transformer is inserted to provide balanced mode drive for the twisted pair cable portion of the overall path indicated in Fig. 1.

The characteristic impedance of each section is determined by:

Z(o) equals the square root of L/C and if the impedance of successive sections is progressively increased the overall network will exhibit a low to high characteristic impedance between the input and the output. The rise time T(r) for a signal (or bandwith BW) is determined for each section by: T(r) equals the square root of LC and for all sections by: T(rN) N /1/3/ is the square root of LC for all

N sections.

Since this circuit is a delay line, the delay per section is determined by: T(d) equals the square root of LC and for all sections by: T(dN) equals N the square root of LC for all N sections.

To properly p...