Browse Prior Art Database

Self Gating And Circuit for an AC Latch

IP.com Disclosure Number: IPCOM000050207D
Original Publication Date: 1982-Sep-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Jones, HC: AUTHOR [+2]

Abstract

This self-gating AND (SGA) circuit provides true and complement outputs at times close to one another, and provides good circuit operating margins. Josephson technology is used to implement the circuit, which is shown in Fig. 1. The design is comprised of four three-junction interferometers A, B, C, and D, and the injection AND gates E and F.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 84% of the total text.

Page 1 of 2

Self Gating And Circuit for an AC Latch

This self-gating AND (SGA) circuit provides true and complement outputs at times close to one another, and provides good circuit operating margins. Josephson technology is used to implement the circuit, which is shown in Fig. 1. The design is comprised of four three-junction interferometers A, B, C, and D, and the injection AND gates E and F.

If a binary 0 is stored in the latch, interferometer B does not switch. This means that no true (T) output will be obtained. Interferometer C switches and provides a control current for interferometer D. Interferometer D then switches, thereby providing the complement (C) output. AND gates E and F serve as amplifiers and maintain proper current levels.

If a binary 1 is stored in the latch, interferometer A is switched, which removes the control current from interferometer C, which does not switch. Hence, there is no complement output, and gate current is provided to interferometer B. Interferometer B switches, and a true (T) output is obtained.

Fig. 2 shows the threshold characteristics of interferometer C for binary 0 and binary 1 in the latch. This circuit has advantages in that the complement output is obtained within a very small amount of time of the true output, and also provides good operating margins.

For a true output (binary 1 in the latch), interferometer C does not switch at all so there is no restriction on the time ranges for the switching of interferometers B and C. The...