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Functional Speed Testing on a Nodal Impedance Tester

IP.com Disclosure Number: IPCOM000050242D
Original Publication Date: 1982-Sep-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Drinkhouse, EW: AUTHOR

Abstract

The card assembly being tested 1 is placed onto the backup plate 2 and positioned under a probehead 3 containing a bed of nails 4. When testing is activated, the locking detent 5 locks the backup plate 2 in position and the probehead 3 moves down so that the bed of nails 4 contacts nodes on the card assembly being tested 1. Pressure from the downward movement of the probehead assembly mates a row of male test points 6 to a receiver 7 fastened to the backup plate 2 and connected by a short wire harness 8 to micro intelligence 9, also a portion of the backup plate 2. Hardware variations on the mating of the card assembly under test 1 to the backup plate intelligence 9 are expected to exist.

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Functional Speed Testing on a Nodal Impedance Tester

The card assembly being tested 1 is placed onto the backup plate 2 and positioned under a probehead 3 containing a bed of nails 4. When testing is activated, the locking detent 5 locks the backup plate 2 in position and the probehead 3 moves down so that the bed of nails 4 contacts nodes on the card assembly being tested 1. Pressure from the downward movement of the probehead assembly mates a row of male test points 6 to a receiver 7 fastened to the backup plate 2 and connected by a short wire harness 8 to micro intelligence 9, also a portion of the backup plate 2. Hardware variations on the mating of the card assembly under test 1 to the backup plate intelligence 9 are expected to exist. No power is applied to the card, and open and short testing of lands commences once all probes 4 have contacted the plane of the card being tested 1. Following the open and short test, components are tested discretely, still typically, with no power. Once this testing is complete, the probehead 3 begins upward movement to disengage itself from the card being tested, leaving the card mated to the intelligent backup plate via items 6 and 7. While the probehead assembly 3 is still moving upward, power is simultaneously applied to the card under test 1 via items 6 and 7 or similar power connection mating and the micro intelligence assembly 9. Immediately thereafter, testing and diagnosing continues at functional speed as determine...