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Palette Select Scheme for a Color Graphics Display

IP.com Disclosure Number: IPCOM000050253D
Original Publication Date: 1982-Sep-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 3 page(s) / 43K

Publishing Venue

IBM

Related People

Dean, ME: AUTHOR [+4]

Abstract

The number of different colors one can display per pixel (picture element) on the color display monitor or a conventional television screen is dependent on how many bits of information per pixel are available to the color generator. The common format is to have three color bits per pixel, such as red, green and blue, and one additional bit to provide two intensity levels. With four bits of information each pixel can have 16 different colors. Many times though each bit of information must come from a separate memory buffer. In a four-bit per pixel scheme, four memory buffers may be required to operate in parallel and synchronously to supply enough information to the display screen. This scheme requires more logic than a single buffer palette operating scheme.

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Palette Select Scheme for a Color Graphics Display

The number of different colors one can display per pixel (picture element) on the color display monitor or a conventional television screen is dependent on how many bits of information per pixel are available to the color generator. The common format is to have three color bits per pixel, such as red, green and blue, and one additional bit to provide two intensity levels. With four bits of information each pixel can have 16 different colors. Many times though each bit of information must come from a separate memory buffer. In a four-bit per pixel scheme, four memory buffers may be required to operate in parallel and synchronously to supply enough information to the display screen. This scheme requires more logic than a single buffer palette operating scheme.

By using a palette select scheme, one can reduce the information required from the graphics memory per pixel. This is done at a cost of being able to display just a subset of the total number of available colors at any one time. A palette scheme can be designed to change a selected group of colors once every scan line or may be selected statically with an I/O bit.

The palette scheme consists of two bits of information per pixel stored in the memory and two bits of information generated through I/O bits. Also, there are four more I/O bits which can be selected when the two information bits from memory equal zero.

Fig. 1 shows a bit map per byte of the graphics storage, and Fig. 2 shows a block diagram of the hardware implementation. As is well known, the red, green and blue and intensity signals applied to a color generator control the actual color of the dot being displayed. Two groups of four signals each are applied to a selector/multiplexer. The signals in the first group are the C0 and C1 signals from the byte of graphics storage and the color select and intensity select signals from the central processing unit (CPU). The second group of signals are four bits, called zero select, applied through the I/O port from the CPU. Depending on the state of the A and B select lines, one group of the four signals is applied at the output of the selector/multiplexer to determine the color of the dot.

As shown in Table 1, whenever C1 and C0 signals applied to the selector/multiplexer are both not equal to zero, a particular color will be associated with the dot to be displayed.

However, if both the C1 and C0 signals are zero bits, then the palette select control logic changes the state of the A and B select lines so that the selector/multiplexer provides the four bits of Zero Select as the red, green, blue and intensity signals from the selector/ multiplexer. As shown in Table 2, the particular values associated with the four bits of Zero Select can cause the dot to be any one...