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Polysilicon Resistors Compatible with Bipolar Integrated Circuits and Method of Manufacture

IP.com Disclosure Number: IPCOM000050311D
Original Publication Date: 1982-Oct-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 3 page(s) / 51K

Publishing Venue

IBM

Related People

Lee, CH: AUTHOR

Abstract

A polysilicon resistor is disclosed whose value is not dependent upon the thickness of the polysilicon layer. The resistor is fabricated at the end of a bipolar process and is subject to a specific heat cycle to optimize the resistor formation. The contact areas for the resistors are improved by either doping or the use of boron silicate glass in the contact area openings.

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Polysilicon Resistors Compatible with Bipolar Integrated Circuits and Method of Manufacture

A polysilicon resistor is disclosed whose value is not dependent upon the thickness of the polysilicon layer. The resistor is fabricated at the end of a bipolar process and is subject to a specific heat cycle to optimize the resistor formation. The contact areas for the resistors are improved by either doping or the use of boron silicate glass in the contact area openings.

An N- silicon epitaxial layer 10 is shown in Fig. 1 with a recessed oxide region 12. A layer of silicon dioxide 14 and silicon nitride 16 are deposited on the layer 10 and etched as part of forming the region 12. A layer of polysilicon 18 is formed on the surface of the layer 10 by conventional techniques. The thickness of layer 18 is of the order of 5,000 Angstroms.

In Fig. 2, a layer of photoresist (not shown) is disposed on the polysilicon to define a resistor area. The polysilicon 18 and nitride 16 outside the masked area are removed by reactive ion etching. The photoresist is removed along with the oxide layer 14. A new layer of oxide 20 is formed on the surface of the layer 10 and across the polysilicon 18, which is patterned in a resistor configuration. The layer 20 is formed by conventional techniques and has a thickness of approximately 1,600 Angstroms.

In Fig. 3, a layer of nitride 22 is formed across the surface of the layer 20 by chemical vapor deposition techniques. A layer of photoresist (not shown) is formed across the surface of the layer 22 and suitably masked to form contact openings 24, 24' for the polysilicon resistor, opening 26 for a subsequent emitter, and opening 28 for a base contact.

In Fig. 4, a first photoresist layer (not shown) is disposed across the surface of the nitride layer 22 and the contact openings, except in the opening 26. The exposed oxide 20 in opening 26 is suitably removed by etching, which is followed by an emitter diffusion. After removal of the photoresist, a second layer 30 is formed across the nitride layer 22 and the openings, except for t...