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Browse Prior Art Database

MESFET Device with Reduced Source and Drain Capacitance

IP.com Disclosure Number: IPCOM000050332D
Original Publication Date: 1982-Oct-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 26K

Publishing Venue

IBM

Related People

Andrade, TL: AUTHOR

Abstract

In conventional gallium arsenide MESFET devices, the N-type source and drain regions are formed in a P-type gallium arsenide substrate and are connected by a shallow N-type channel region, on whose upper surface is located the Schottky barrier metal to form the gate region. In these existing MESFET devices, there is a substantial PN junction capacitance between the N-type source or N-type drain and the surrounding P-type region. This capacitance hampers the switching speed of the device.

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MESFET Device with Reduced Source and Drain Capacitance

In conventional gallium arsenide MESFET devices, the N-type source and drain regions are formed in a P-type gallium arsenide substrate and are connected by a shallow N-type channel region, on whose upper surface is located the Schottky barrier metal to form the gate region. In these existing MESFET devices, there is a substantial PN junction capacitance between the N- type source or N-type drain and the surrounding P-type region. This capacitance hampers the switching speed of the device.

This problem is overcome by the structure shown in the figure, wherein a semi-insulating gallium arsenide substrate 1 has formed on the surface thereof a relatively thin P-type layer 2 having a thickness of approximately 2,000 Angs. A source region 3 and drain region 4 of N-type conductivity are diffused or ion implanted into the P-type layer 2 so as to penetrate completely through the P- type layer 2 and into the semi-insulating gallium arsenide substrate 1. The N-type channel region 5, connecting the source 3 and drain 4, is formed with a more shallow thickness than the P-type layer 2. The Schottky barrier gate 6 is then located over the channel region and the source and drain contacts 7 respectively located on the source and drain regions to complete the device.

In the resultant device, the parasitic capacitance around the source and drain regions is reduced by the penetration of the source and drain regions through the ...