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Activation and Deactivation of Reserve Release Logic in a Multiprocessing System

IP.com Disclosure Number: IPCOM000050356D
Original Publication Date: 1982-Oct-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 14K

Publishing Venue

IBM

Related People

Moore, BB: AUTHOR [+6]

Abstract

In a multiprocessing system, removal of an "I/O side" (a discrete collection of channel paths) normally requires the remaining system to activate reserve-release logic when I/0 is directed to devices covered by a shared uniprocessor (MVS "shared up" option). The rationale is that the remaining system has no knowledge of how the removed I/O side will be used. However, when certain knowledge is available through the interface between the system control program (SCP) and a maintenance and service support facility (MSSF), the remaining system will be able to activate reserve-release logic only when required.

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Activation and Deactivation of Reserve Release Logic in a Multiprocessing System

In a multiprocessing system, removal of an "I/O side" (a discrete collection of channel paths) normally requires the remaining system to activate reserve- release logic when I/0 is directed to devices covered by a shared uniprocessor (MVS "shared up" option). The rationale is that the remaining system has no knowledge of how the removed I/O side will be used. However, when certain knowledge is available through the interface between the system control program (SCP) and a maintenance and service support facility (MSSF), the remaining system will be able to activate reserve-release logic only when required.

The information required by the SCP is whether or not a System Controller (SC) accompanies the I/O side when it is removed (varied offline). When a SC is removed, the removed I/O side can then be combined with other elements (i.e., processor and storage) to form a system capable of sharing I/O with the remaining system. When this is possible (i.e., a SC is involved), reserve-release logic must be activated because ownership of the I/O side has been relinquished. Also, when an I/O side is varied online and is accompanied by a SC, the acquiring system may deactivate reserve-release logic for devices sharing a uniprocessor because ownership of the I/O side has been affected. The above example assumes hardware which involves only two SCs. Therefore, whenever a SC is gained or removed, the SCP will deactivate or activate reserve-release logic, respectively. The following description is more general to a multi-SC system in which the SCP is MVS (Multiple Virtual Storage).

For MVS to activate reserve logic upon removal of the first SC, and deactivate reserve logic upon acquiring the last SC, the following is required. MVS will, at initialization time, solicit the MSSF via the

SCP/MSSF communication path to identify all installed channel

paths and identify the ones owned by the requestor.

MVS, when removing or acquiring an I/O side, will solicit

the MSSF to identify which channel paths are involved.

MVS, when removing or acquiring an I/O side, will solicit

the MSSF to identify whether or not a SC is involved.

Use of the above information is demonstrated by the following example.

Exemplary Assumptions
1) T...