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Josephson Junction Regulator Circuit

IP.com Disclosure Number: IPCOM000050422D
Original Publication Date: 1982-Oct-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Chang, WH: AUTHOR

Abstract

Series connected Josephson junctions shunted by a capacitance provide a waveform dwell required to minimize punchthrough.

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Josephson Junction Regulator Circuit

Series connected Josephson junctions shunted by a capacitance provide a waveform dwell required to minimize punchthrough.

Josephson logic circuits are generally powered with a sinusoidal AC drive, but in order to prevent the problem of punchthrough when the AC power changes polarity, it is desirable to have a dwell time near zero AC current. Fig. 1 shows a combination of series-connected Josephson junctions B to provide better device operation with less punchthrough. Use of the circuit alters the power waveform supplied to Josephson logic circuits 10. The four Josephson junction shunt device A is a power supply regulator; the additional Josephson junction (or several series junctions B located between the input and regulator A) can have an optional shunt capacitor C. Even without capacitor C, junctions B always punchthrough. Control current I(c) is ueed to suppress the critical current I(mo) of the junctions.

Fig. 2A shows the input AC waveform, while Fig. 2B shows the voltage across capacitor C. Fig. 2C shows the voltage output to circuit 10 where the dwell-time t is controlled by the voltage drop across junctions B. The voltage height V is controlled by the voltage across junctions A. The dotted waveform 12 is that which is present if junctions A are not used in the circuit.

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