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Sequential Machine Comparison Using Symbolic Simulation

IP.com Disclosure Number: IPCOM000050513D
Original Publication Date: 1982-Nov-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 59K

Publishing Venue

IBM

Related People

Ofek, H: AUTHOR

Abstract

In most prior analytic design verification tools, the scope of verification has been restricted to such problems which allowed for Boolean comparison to be performed. Typically, this would be the case when the relationship between the two models being compared is defined as an isomorphic relation. In the strict sense, isomorphism entails the dual requirement that a one to one correspondence exists between Primary Inputs, Primary Outputs, and Storage Elements and that the same next state function exists for both models. A relaxation is permissible only for the purpose of modifying the combinational nature of the models. No change of the sequential nature of the models is allowed.

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Sequential Machine Comparison Using Symbolic Simulation

In most prior analytic design verification tools, the scope of verification has been restricted to such problems which allowed for Boolean comparison to be performed. Typically, this would be the case when the relationship between the two models being compared is defined as an isomorphic relation. In the strict sense, isomorphism entails the dual requirement that a one to one correspondence exists between Primary Inputs, Primary Outputs, and Storage Elements and that the same next state function exists for both models. A relaxation is permissible only for the purpose of modifying the combinational nature of the models. No change of the sequential nature of the models is allowed. In other words, if a particular operation in one model requires one transition between machine states, the model to which it is compared is also assumed to have a single state transition for the same operation.

Sometimes, the two models to be compared are not isomorphic. In some such cases, it is possible to employ a symbolic simulator, which transforms a given machine model to its functional equivalent, so that the resultant model is isomorphic to the model with which it is to be compared. Subsequently, a Boolean comparison can be used in a similar way to the one currently used for the isomorphic case.

In the past, when a high level model and a low level model were to be compared, the high level model would be transformed into a low level psuedo implementation model, and the two...