Browse Prior Art Database

Drive Scheme for a Full Bridge, High Frequency DC to /AC Converter

IP.com Disclosure Number: IPCOM000050598D
Original Publication Date: 1982-Nov-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 63K

Publishing Venue

IBM

Related People

Clemo, RM: AUTHOR [+3]

Abstract

An eight-transistor, full bridge, high frequency DC to AC converter is described wherein the transistors, switching two pairs at a time, convert a bulk DC voltage into Q 20 KHz square wave applied to the primary winding of a power output transformer. Current sharing is forced between transistors in a pair, and catastrophic turn-on of the switching transistors is eliminated. A related regulator circuit is described in the U.S. Patent 3,670,234.

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Drive Scheme for a Full Bridge, High Frequency DC to /AC Converter

An eight-transistor, full bridge, high frequency DC to AC converter is described wherein the transistors, switching two pairs at a time, convert a bulk DC voltage into Q 20 KHz square wave applied to the primary winding of a power output transformer. Current sharing is forced between transistors in a pair, and catastrophic turn-on of the switching transistors is eliminated. A related regulator circuit is described in the U.S. Patent 3,670,234.

Referring to Fig. 1, the circuit includes transformers 1T2, 1T3 and 2T3, capacitors 1C3, 2C3 and 3C3, transistors 1Q1 through 8Q1 and 1Q3 through 4Q3, diodes lCR3 through 4CR3 and lCR5 through 6CR5. resistors 1R2 through 8R2, 1R11, 2R11, 1A1, and module 1ZM4. Waveforms are shown in Fig. 2.

Only the primary winding of the output transformer, 1T2, is shown. The interstage transformers 1T3 and 2T3 are used to control the switching transistors 1Q1 through 8Q1. Interstage transformer 1T3 controls transistor pairs 1Q1, 2Q1 and 3Q1, 4Q1 so that only one pair can be turned on at a time.

It is assumed that the circuit is running under steady state conditions. At time t0, the signal at 1ZM4-1 goes low, turning 1Q3 and 3Q3 off. Now the centertap currents of 1T3 and 2T3 which were evenly split between currents IC1 through IC4 can only flow as part of IC1 and IC3. This polarizes the windings, negative at the dots, thus forward biasing the transistor pairs 1Q1, 2Q1 and 7Q...