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Browse Prior Art Database

Doped Trench Isolation Process

IP.com Disclosure Number: IPCOM000050637D
Original Publication Date: 1982-Nov-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 44K

Publishing Venue

IBM

Related People

Silverman, RR: AUTHOR

Abstract

A process is provided for doping the sidewalls and bottom of a trench formed in a semiconductor substrate, which is particularly useful for field-effect transistor (FET) isolation.

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Doped Trench Isolation Process

A process is provided for doping the sidewalls and bottom of a trench formed in a semiconductor substrate, which is particularly useful for field-effect transistor (FET) isolation.

As illustrated in Fig. 1, a semiconductor substrate 10, preferably of lightly doped P type conductivity, has a layer of silicon dioxide 12 grown thereon over which is disposed a layer of photoresist 14. An opening 16 is formed by known techniques through photoresist and silicon dioxide layers 14 and 12, respectively, to expose the surface of substrate 10.

Through opening 16, P type ions, e.g., boron, are implanted into substrate
10. As indicated in Fig. 1, multiple implants I/Ia, I/Ib and I/Ic are made with, e.g., implant I/Ia being introduced at an intensity of 190 KeV implant, I/Ib at an intensity of 115 KeV and implant I/Ic at an intensity of 70 KeV, all at a dose of 2 x 10/13/ ions/cm/2/. If desired, one implant may be employed having a varying gradient. After the ions have been implanted into substrate 10 and the photoresist layer 14 removed, a known heat treatment is performed to form a uniformly doped P type pocket 18, as indicated in Fig. 2, having boundaries diffused beyond opening 16.

Using the original opening 16 in the silicon dioxide layer 12, a trench 20 is formed by reactive ion etching techniques in substrate 10 with a portion of P type pocket 18 remaining around the sidewalls and bottom of trench 20. If additional dopant is required at th...