Browse Prior Art Database

CMOS Function Generator

IP.com Disclosure Number: IPCOM000050644D
Original Publication Date: 1982-Nov-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Related People

Hiltebeitel, JA: AUTHOR

Abstract

A function generator is provided in complementary metal oxide semiconductor (CMOS) technology which may be inserted in a circuit chain to force or set a signal level or to maintain an established signal level in the succeeding stage of the chain. By using only six transistors invert, tri-state, one and zero functions are provided.

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CMOS Function Generator

A function generator is provided in complementary metal oxide semiconductor (CMOS) technology which may be inserted in a circuit chain to force or set a signal level or to maintain an established signal level in the succeeding stage of the chain. By using only six transistors invert, tri-state, one and zero functions are provided.

The circuit of the function generator illustrated in the figure includes N channel transistors T1, T2 and T3 and P channel transistors T4, T5 and T6.

In the operation of the circuit, when terminal X has a 0 or down voltage and terminal Y has a 1 or up voltage, a signal applied to the input is inverted at the output. When terminal X has an up voltage and terminal Y has a down voltage, the output floats, i.e., at high impedance or tri-state, independently of the input signal at a voltage determined by its most recent low impedance state and succeeding stage input impedances. With both terminals X and Y at an up voltage, the output is down, and with both terminals X and Y at a down voltage, the output is up.

If desired, N channel transistor T2 and P channel transistor T6 may be eliminated from the circuit, in which case the modified circuit provides only the invert and tri-state functions.

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