Browse Prior Art Database

Character Display System for a High Resolution CRT Display

IP.com Disclosure Number: IPCOM000050665D
Original Publication Date: 1982-Dec-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Sonoda, H: AUTHOR

Abstract

In a seal verification device for a banking system using a high resolution CRT for displaying an image pattern such as a seal pattern, several lines of characters, such as alphanumerics in a 5x7 dot matrix, can also be displayed simultaneously with the image pattern on a CRT screen, which is divided into a few areas, as shown in Fig. 1, one for the image pattern and the others for the characters. For displaying the characters large enough for the operator to see easily without using a high resolution character generator, the raster space is expanded only in the character area by controlling the vertical deflection signal in the conventional manner, and the bit transmission rate from a character generator to a CRT video circuit is lowered by controlling the timing clock without modifying the horizontal deflection circuit.

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Character Display System for a High Resolution CRT Display

In a seal verification device for a banking system using a high resolution CRT for displaying an image pattern such as a seal pattern, several lines of characters, such as alphanumerics in a 5x7 dot matrix, can also be displayed simultaneously with the image pattern on a CRT screen, which is divided into a few areas, as shown in Fig. 1, one for the image pattern and the others for the characters. For displaying the characters large enough for the operator to see easily without using a high resolution character generator, the raster space is expanded only in the character area by controlling the vertical deflection signal in the conventional manner, and the bit transmission rate from a character generator to a CRT video circuit is lowered by controlling the timing clock without modifying the horizontal deflection circuit.

In Fig. 2, a device for accomplishing the above is shown in which a half divider (1/2 Divider) is used in a conventional image and character pattern generation circuit for reducing in half the frequency of the clock signals from a clock generator to double the interval of the bits transferred from a character generator to a video circuit through a shift register when the address signal from a controller (CRT-C) indicates the character area. Also, when the character area is addressed, a Raster Expansion signal is generated through a decoder (DEC) and flip-flop (FF) to the vertical deflecti...