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P Buffer Gallium Arsenide Process for Digital Logic

IP.com Disclosure Number: IPCOM000050684D
Original Publication Date: 1982-Dec-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 21K

Publishing Venue

IBM

Related People

Andrade, TL: AUTHOR

Abstract

Most gallium arsenide digital logic devices are fabricated on semi-insulating gallium arsenide which is neither N-type nor P-type but has a deep acceptor dopant Which compensates for the residual donors in the bulk material. This semi-insulating property simplifies device isolation and since the substrate is neither P-type nor N-type, junction capacitance is at a minimum. Unfortunately, because the dopants, like silicon in the gallium arsenide, have a high dielectric constant, electrical cross coupling can be a problem.

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P Buffer Gallium Arsenide Process for Digital Logic

Most gallium arsenide digital logic devices are fabricated on semi-insulating gallium arsenide which is neither N-type nor P-type but has a deep acceptor dopant Which compensates for the residual donors in the bulk material. This semi-insulating property simplifies device isolation and since the substrate is neither P-type nor N-type, junction capacitance is at a minimum. Unfortunately, because the dopants, like silicon in the gallium arsenide, have a high dielectric constant, electrical cross coupling can be a problem.

This problem is overcome by drawing a P- gallium arsenide buffer layer 2 on the surface of a P+ gallium arsenide bulk material 1, as shown in the figure. The P- buffer layer 2 of gallium arsenide can be doped with zinc or magnesium ions to a concentration of approximately 10/16/ per cubic centimeter, and the layer 2 can have a depth of approximately the order of the wiring pitch for the devices to be formed on the integrated circuit chip. The epitaxially grown layer 2 will then have the source and drain regions 3 and 4, of N-type conductivity, ion implanted into the surface thereof. The resultant MESFET device will have reduced junction capacitance for the N-type source and drain regions due to the reduced P-type conductivity concentration in the epitaxial layer 2. The resultant device therefore overcomes the electrical cross coupling problem since the dielectric constant of the epitaxial gallium...