Browse Prior Art Database

Method of Sequencing Stepper Motor Phases

IP.com Disclosure Number: IPCOM000050859D
Original Publication Date: 1982-Dec-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 3 page(s) / 56K

Publishing Venue

IBM

Related People

Fitch, DG: AUTHOR [+2]

Abstract

In a stepper motor system, the rotor is moved by energizing the stator windings in a defined sequence. The phase sequencer function of a stepper motor controller determines or specifies what phase combination is required to achieve the next incremental motion. A very efficient method of realizing a phase sequence or function is disclosed. For example purposes only, a three-phase, half-step stepping motor sequence is assumed. The phase sequence for such an example is illustrated in Fig. 1.

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Method of Sequencing Stepper Motor Phases

In a stepper motor system, the rotor is moved by energizing the stator windings in a defined sequence. The phase sequencer function of a stepper motor controller determines or specifies what phase combination is required to achieve the next incremental motion. A very efficient method of realizing a phase sequence or function is disclosed. For example purposes only, a three-phase, half-step stepping motor sequence is assumed. The phase sequence for such an example is illustrated in Fig. 1.

In the exemplary three-phase system of Fig. 1, the half-step numbers are designated in association with the phases that are on or off in the exemplary three-phase system. Each of the step numbers is given a binary sequence in one of the columns and the direction of forward or reverse. The six phase combinations are stored (in binary format) in memory such that the contents of the memory location and its address are adjacent half-steps. This permits the "mixed" phase to be accessed by using the "present" phase as a memory address. The memory containing the phase combination is referred to as the "phase table".

A conceptual implementation of this method is illustrated in Fig. 2. The three- bit master slave latch contains the present phase which is simultaneously provided to the stepper motor driver and to the address inputs of the phase table memories. Only one memory at a time is enabled. The lower memory is enabled for stepping in the forward direction, and the upper memory is enabled for stepping in the reverse direction. The contents of the addressed location of the enabled memory become the input data to the master/slave latch. The latch is clocked at the motor step rate. When a pulse appears at the clock input of the master/slave latch the input data is transferred into the latch, thus changing the stepper motor phase and phase table address.

The procedure is further explained in the following example. Suppose the master/slave latch contains the binary value 001 and the direction Input is zero. Then, according to Fig. 1, the stepper motor will have phase A and phase B on (energized) and phase C off (deenergized). The forward direction phase memory is enabled. The contents of the forward direction phase memory location addressed by 001 is 011, so that the input data to the master/slave latch is 011. When the master/slave latch is clocked, the value 011 is transferred into the latch. This changes the stepper motor driver input to phase A on and phases B and C off. The new input data to the master/slave latch is 010. The next high in the master/slave latch is clocked, the stepper motor changes to phases A and C on and phase B off, and the new input data becomes 110. It should be apparent that the forward direction sequence shown in Fig. 1 is followed.

If the direction signal is changed to 1 before the latch is clocked, the input data will change from 110 to 011. (Note: 011 corresponds to address 010 of t...