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Process for Simultaneously Making Silicide Gate, Source and Drain Electrodes

IP.com Disclosure Number: IPCOM000051060D
Original Publication Date: 1982-Aug-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 87K

Publishing Venue

IBM

Related People

Geipel, HJ: AUTHOR [+2]

Abstract

A process is provided for simultaneously making gate, source, and drain electrodes for a field-effect transistor with the use of high conductivity silicides.

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Process for Simultaneously Making Silicide Gate, Source and Drain Electrodes

A process is provided for simultaneously making gate, source, and drain electrodes for a field-effect transistor with the use of high conductivity silicides.

The process steps include forming recessed oxide regions 10 with the use of a first mask in a silicon substrate 12 and then growing a thin gate oxide layer 14 between the recessed oxide regions 10, as indicated in Fig, 1. With the use of a photoresist layer 16 and a second mask, openings are provided in the gate oxide layer 14, and source and drain regions 18 and 20 are formed in substrate 12 by ion implantation of arsenic. By using a third mask and lift off techniques, openings 22, 24 and 26 are formed in photoresist layer 28, and a cobalt layer 30 followed by a silicon layer 32 are deposited through the openings 22, 24 and 26, as indicated in Fig. 2.

After removing all of photoresist layer 28, arsenic is again implanted to form source and drain extension regions 34 and 36, and cobalt and silicon layers 30 and 32 are converted into cobalt silicide electrodes 38, 40 and 42 by the use of an appropriate heating treatment, as indicated in Fig. 3. Alternatively, the structure defined by mask 28 can be co-deposited cobalt silicide, followed by a thin silicon layer. Silicide electrodes 38 and 42 contacting source and drain regions 18 and 20, respectively, serve as source and drain electrodes, and silicide electrode 40 serves as the gate electrode, It can be seen that the source and drain extension regions 34 and 36 are aligned with gate electrode 40...