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Recessed Oxidation Process to Reduce Boron Concentration Around Perimeter of Active Device Regions

IP.com Disclosure Number: IPCOM000051088D
Original Publication Date: 1982-Aug-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 3 page(s) / 58K

Publishing Venue

IBM

Related People

De La Moneda, FH: AUTHOR [+2]

Abstract

Thick seki-recessed silicon dioxide 10 used to isolate MOSFETs and n+ diffusions has a p+ layer 9 implanted thereunder to obtain high thick oxide threshold voltage. This boron implantation is done at the beginning of the fabrication process and consequently is driven in by subsequent heat cycles. That portion of the boron which spreads laterally significantly increases the p-type doping concentration around the perimeter of the active device regions containing MOSFETs and n+ diffused inter-connections, as illustrated in the Fig. 1 cross-section.

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Recessed Oxidation Process to Reduce Boron Concentration Around Perimeter of Active Device Regions

Thick seki-recessed silicon dioxide 10 used to isolate MOSFETs and n+ diffusions has a p+ layer 9 implanted thereunder to obtain high thick oxide threshold voltage. This boron implantation is done at the beginning of the fabrication process and consequently is driven in by subsequent heat cycles. That portion of the boron which spreads laterally significantly increases the p- type doping concentration around the perimeter of the active device regions containing MOSFETs and n+ diffused inter-connections, as illustrated in the Fig. 1 cross-section.

The increase of the p-type concentration around the perimeter of the active device regions has the following adverse effects on the electrical parameters of the devices therein: (1) It increases the threshold voltage of narrow channel

MOSFETs. This is particularly detrimental to depletion

devices used for the load element of inverter circuits.

(2) It increases the perimeter capacitance of n+ diffusions

by a factor between 2 and 3 to make the perimeter

component dominant. This is very detrimental to long and

narrow diffused interconnections, such as bit lines in

random-access memory arrays.

(3) It reduces the junction breakdown voltage which conflicts

with the specifications of bootstrap circuits.

The following process automatically redefines the perimeter of active device regions a predetermined distance away from its original common boundary with the boron implant. This offset leads to less boron concentration at the perimeter of active devices and improvement of the above-described parameters.

A thermal thin silicon dioxide pad 12 is grown on the starting p-layer 13. A third masking layer 14 is deposited on layer 13, as seen in Fig. 2, on which the field region...