Browse Prior Art Database

Poly Filled Trench Isolation

IP.com Disclosure Number: IPCOM000051102D
Original Publication Date: 1982-Aug-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 3 page(s) / 60K

Publishing Venue

IBM

Related People

Bhatia, HS: AUTHOR [+5]

Abstract

A new isolation structure is described below for thin film devices having an epitaxial layer of the order of one micron. The new isolation structure reduces the magnitude of the isolation junction capacitance and lowers the accompanying voltage breakdown which is otherwise due to boron depletion and arsenic pile-up at the oxide-silicon interface. The new isolation structure separates the peak concentrations of P isolation and H subcollector and avoids arsenic pile-up near the bottom of the silicon trench. A new isolation structure is formed as follows.

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Poly Filled Trench Isolation

A new isolation structure is described below for thin film devices having an epitaxial layer of the order of one micron. The new isolation structure reduces the magnitude of the isolation junction capacitance and lowers the accompanying voltage breakdown which is otherwise due to boron depletion and arsenic pile-up at the oxide-silicon interface. The new isolation structure separates the peak concentrations of P isolation and H subcollector and avoids arsenic pile-up near the bottom of the silicon trench. A new isolation structure is formed as follows.

In Fig. 1, a P substrate 10 is appropriately patterned to form an N region 12 and an N+ region 14 which serve as adjacent subcollectors. N epitaxial layer 16 is grown on the substrate 10, and autodoping occurs into the layer 16 by the regions 12 and 14. Fig. 1 is completed by an oxide layer 18 approximately 0.20 micron thick formed across the surface of layer 16.

In Fig. 2, a layer of silicon nitride 20 is formed across the layer 18 of silicon dioxide. The layer 20 is formed of a thickness of about 0.05 micron and may be formed by CVD techniques. A second layer of silicon dioxide 22 is formed across the layer 20. The layer 22 is formed by CVD techniques and has a thickness of approximately 0.10 micron. The layer 22 is appropriately patterned with photoresist to form openings 24 and 26 in the layer 16. The openings 24 and 26 are created by first reactive ion etching the silicon dioxide layers 18 and 22, and the silicon nitride layer 20 using the photoresist (not shown) as a mask. Thereafter, the exposed epi layer 16 is reactive ion etched to form a trench of approximately 4,000 Angstrom in depth.

In Fig. 3, a thermal oxide layer 28 is formed along the sidewalls of the trenches 24 and 26. After the layer 28 is formed, the remaining space in the trenches 24 and 26 is filled with silicon dioxide by chemical vapor depositi...