Browse Prior Art Database

Dual Address Spaces for Channel Relocation

IP.com Disclosure Number: IPCOM000051150D
Original Publication Date: 1982-Aug-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Sheldon, RJ: AUTHOR

Abstract

A mechanism provides addressability to a second address space for channels utilizing Dynamic Address Translation (DAT). A start I/O information block contains the device address and two address space designation pointers. A special bit in the Channel Command Word (CCW) designates which address space the CCW address field is referencing.

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Dual Address Spaces for Channel Relocation

A mechanism provides addressability to a second address space for channels utilizing Dynamic Address Translation (DAT). A start I/O information block contains the device address and two address space designation pointers. A special bit in the Channel Command Word (CCW) designates which address space the CCW address field is referencing.

The Start I/O (SIO) machine instructions 2 have a pointer to an Operation Information Table (OIT) 3 which contains the I/O Device Address and two Address Space Designators (ASDs). The first ASD is a Primary ASD (PASD), and the second is a Secondary ASD (SASD). For the well known two-level IBM System 370 DAT, the PASD and SASD would be segment table-origihs pointing to address space segment tables 4 and 5.

The CCW format contains a special bit, called the Secondary Address Space Data flag (SASD flag). When the channel executes CCWs for a particular SIO operation, it interrogates the SASD flag bit. If the flag bit is zero, the CCW address references the primary address space designated by the PASD, and if the SASD flag is one, the CCW address references the secondary address space designated by the SASD. If CCWs are chained together, two consecutive CCWs can designate different address spaces.

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