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Browse Prior Art Database

Simplified Phase Locked Loop

IP.com Disclosure Number: IPCOM000051174D
Original Publication Date: 1982-Aug-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 4 page(s) / 55K

Publishing Venue

IBM

Related People

Davie, NR: AUTHOR [+2]

Abstract

A simplified phase-locked loop (PLL) is provided by an improved phase discriminator which compares the phase of the incoming data stream with that of a voltage-controlled oscillator (VCO). This system uses a new phase discriminator and data sampling scheme. The charge pump, filter, and VCO are conventional.

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Simplified Phase Locked Loop

A simplified phase-locked loop (PLL) is provided by an improved phase discriminator which compares the phase of the incoming data stream with that of a voltage-controlled oscillator (VCO). This system uses a new phase discriminator and data sampling scheme. The charge pump, filter, and VCO are conventional.

The essential elements of a PLL are shown in Fig. 1. The VCO output signal is phase compared to the digitized data read from a disk file in a phase discriminator (PHD) circuit. The result of the comparison controls the sign and quantity of current from a charge pump. The charge pump current, in turn, generates a voltage change across an RC filter which is essentially proportional to phase error.

The resulting filtered output is a varying voltage which controls the VCO in such a manner as to cause the VCO frequency and phase to be maintained in a desired relationship to the average frequency and phase of the data stream. In practice, the data stream contains time jitter or imperfect bit spacing due to varying code sequences, head roll, and variations in disk drive speed. The VCO should respond to the average over a period of time equal to several data bits. The desired response is determined by the filter design. When properly controlled, the VCO creates the timing for correct interpretation of the data stream.

The object of the PLL is to control the VCO frequency and phase such that a sequence of evenly spaced data pulses will correspond in time to the center of the VCO-generated data window.

An early data pulse will generate a positive current from the charge pump and a late pulse causes a negative current to flow. If no pulse occurs in a particular data window then no correction should be made. This normally requires the system to store the currents until the next data cell, thereby complicating the circuitry. The system to be described avoids the need to store the charge. The simple early and late indications are developed from only two signals, DATA SINGLE-SHOT and VCO, and operate to directly control the charge pump.

Fig. 2 portrays the operation. HRZI DATA triggers a DATA SINGLE SHOT through an EXCLUSIVE OR. In the circuit of Fig. 2a, the increase frequency function is VCO.DATA SINGLE-SHOT. The decrease frequency function is VCO.DATA SINGLE-SHOT. Both functions are applied directly to the charge pump. It will be noted that for the on-time condition (or perfect tracking of uniform data) the center of the DATA SINGLE-SHOT is in time coincidence with the rise of VCO. Also, for on-time data, equal positive and negative charges are emitted by the CHARGE PUMP. Because of the smoothing effect of the filter and the duration of the single shot timing, this net charge of zero will not affect the VCO phase.

Fig. 2b is a timing diagram of the DATA SINGLE-SHOT and its Center Indicator (CT) to form the final data out. The timing relationship for an on-time

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and an early pulse is also shown. NRZ...