Browse Prior Art Database

Variable Channel Bandwidth

IP.com Disclosure Number: IPCOM000051175D
Original Publication Date: 1982-Aug-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 3 page(s) / 53K

Publishing Venue

IBM

Related People

Braid, RM: AUTHOR [+4]

Abstract

It is not unusual for an existing computer system to have channel data buses Which consist of two 9-bit unidirectional data buses: Data Bus Out (DBO) and Data Bus In (DBI). These two data buses provide the data path for transferring information to/from the processor from/to the I/O device. The DBO Is used when transferring a byte (9 bits) of data from the processor to the I/O device. The DBI is used for data transfer in the opposite direction. The operations of these two buses are mutually exclusive of each other. The existing I/O device attachments would use this mode of operation.

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Variable Channel Bandwidth

It is not unusual for an existing computer system to have channel data buses Which consist of two 9-bit unidirectional data buses: Data Bus Out (DBO) and Data Bus In (DBI). These two data buses provide the data path for transferring information to/from the processor from/to the I/O device. The DBO Is used when transferring a byte (9 bits) of data from the processor to the I/O device. The DBI is used for data transfer in the opposite direction. The operations of these two buses are mutually exclusive of each other. The existing I/O device attachments would use this mode of operation.

In order to enhance the existing computer system, it is desirable to have the capability of attaching I/O devices with faster data transfer rates while supporting existing I/O devices. Due to card packaging restrictions, it may not be possible to double the number of unidirectional data bus lines. With fixed memory cycle times, it would not be feasible to reduce the time required to transfer one byte of data.

The solution to this problem, that would satisfy these requirements, is to combine the two unidirectional buses into a bidirectional bus in such a way that both modes could be used. By combining two 9-bit unidirectional buses into one bidirectional bus, it is possible to double the data transfer rate. Where one byte is transferred in the unidirectional mode, two bytes of data would be transferred in the bidirectional mode during the same time period. Also, by providing a means of switching the data bus between the unidirectional mode and the bidirectional mode, two different data rates can be obtained.

Unidirectional Byte Mode Memory to I/O (Fig. 1) 1. One byte wide data is placed on System Bus Low by the CPU (central processing unit, not shown), and is gated by

Selector B. 2. Data Buffer D clocks in the byte and sends it to Selector F. 3. Selector F gates the contents of Data Buffer D. 4. Gate H passes the data onto the DBO. 5. The device then clocks in...