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Browse Prior Art Database

Single Shot Control Pulse Generation

IP.com Disclosure Number: IPCOM000051214D
Original Publication Date: 1982-Aug-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 69K

Publishing Venue

IBM

Related People

Koppelman, GM: AUTHOR

Abstract

In Josephson technology, it is useful to have a full cycle with pulse of only one cycle to be used for the SCAN mode and for single cycle diagnostic control. Such a pulse is also useful for interface timing synchronization between host circuits and test vehicles. Fig. 1 shows a circuit for generating a single-shot pulse of one cycle duration. Waveforms (a), (b), and (c) are also shown. This circuit will receive single shot and reset inputs from a host circuit at room temperature (RT) and is on the Josephson chip at low temperature (LT). The circuit combines a set-reset latch, a self resetting latch, and a two-input AND gate 10. It allows a "1" signal to latch into the two-input AND for one active duty cycle only at some indeterminate time following activation of the "single shot" control from the room temperature host.

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Single Shot Control Pulse Generation

In Josephson technology, it is useful to have a full cycle with pulse of only one cycle to be used for the SCAN mode and for single cycle diagnostic control. Such a pulse is also useful for interface timing synchronization between host circuits and test vehicles. Fig. 1 shows a circuit for generating a single-shot pulse of one cycle duration. Waveforms (a), (b), and (c) are also shown. This circuit will receive single shot and reset inputs from a host circuit at room temperature (RT) and is on the Josephson chip at low temperature (LT). The circuit combines a set-reset latch, a self resetting latch, and a two-input AND gate 10. It allows a "1" signal to latch into the two-input AND for one active duty cycle only at some indeterminate time following activation of the "single shot" control from the room temperature host. A later activation of a reset control signal from the host will reset the circuitry, leaving it in a state to receive another singleshot.

This circuit allows a slow pulse from a room temperature host (which appears to the Josepson circuit as a quasi DC level - see Fig. 2) to trigger a "strobe" full cycle logic activating signal for only one logic cycle in order to advance a scan chain one step, or to activate only one regular logic cycle at which time a further diagnostic step can be taken.

In Fig. 2, there are n cycles between the single-shot host signal and the Josephson test vehicle active cycle, where n is i...