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Josephson Device Regulator Circuit

IP.com Disclosure Number: IPCOM000051215D
Original Publication Date: 1982-Aug-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 27K

Publishing Venue

IBM

Related People

Chang, WH: AUTHOR

Abstract

In Josephson technology, the problem of punchthrough is well known. known. This problem occurs when the devices do not reset sufficiently fast as the power supply waveform goes to zero. In order to correct this problem, numerous techniques have been devised for introducing a "dwell time" when the waveform passes through zero. However, some of these approaches reduce the time available for the active duty cycle of the circuit. The circuit shown lengthens the active duty cycle without reducing the amount of dwell provided near the zero crossing.

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Josephson Device Regulator Circuit

In Josephson technology, the problem of punchthrough is well known. known. This problem occurs when the devices do not reset sufficiently fast as the power supply waveform goes to zero. In order to correct this problem, numerous techniques have been devised for introducing a "dwell time" when the waveform passes through zero.

However, some of these approaches reduce the time available for the active duty cycle of the circuit. The circuit shown lengthens the active duty cycle without reducing the amount of dwell provided near the zero crossing.

The circuit is comprised of a current source 10 and a series of Josephson junctions J1, J2, as shown in Fig. 1. Regulator strings 12 and 14 of Josephson Junctions are in parallel between the current source 10 and the Josephson circuitry represented by the load R(L). In order to improve the active duty cycle time of the circuit, a series inductor L is used.

Fig. 2 shows the output waveform obtained from the circuit of Fig. 1, with and without the presence of series inductance L. If inductance L is not present, the output waveform resets to zero much slower than the rate at which it increases from zero to full voltage value. This reduces the time available for the active duty cycle. However, when inductance L is in the circuit, the time that the output waveform stays high and flat (active duty cycle) lengthens, but the time the waveform stays near zero (i.e., dwell time) remains unchanged. T...