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EKG Electrode Artifact Rejection Circuit

IP.com Disclosure Number: IPCOM000051273D
Original Publication Date: 1980-Dec-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 49K

Publishing Venue

IBM

Related People

Coker, CW: AUTHOR [+2]

Abstract

This article shows circuitry which detects the presence of artifact on any one of three closely spaced electrodes which are used to form a single EKG lead set and to automatically select an artifact-free electrode as the EKG signal source from the lead set.

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EKG Electrode Artifact Rejection Circuit

This article shows circuitry which detects the presence of artifact on any one of three closely spaced electrodes which are used to form a single EKG lead set and to automatically select an artifact-free electrode as the EKG signal source from the lead set.

Artifact detection circuitry 1 is shown in Fig. 1. Signals from three electrodes 2 are separately amplified by EKG amplifiers 3. Three difference signals A-B B-C A-C are formed by difference amplifiers 4 and applied to zero detect circuits 5. Zero detect circuits 5 produce an artifact output signal when the input signal amplitude is greater than zero by a fixed amount, VREF. Majority logic 6 requires at least two of the three leads to be artifact-free, and if this condition is satisfied, then it selects one of the leads A, B, and C.

Reference electrode 7 may be one or three closely spaced electrodes to achieve artifact rejection.

Fig. 2 shows an embodiment of zero detect circuit 5. A positive output signal is generated whenever the input is more positive then r VREF or more negative than -VREF. When the input is less than + VREF and greater than - VREF the output is zero. Two electrode signals are considered equal when their difference is smaller than VREF. VREF is shown set by a resistor 8 and potentiometer 9. A nominal value for VREF can be about 10% of the normal EKG amplitude at the output of an EKG amplifier 3. This allows for normal mismatches in the source signal...