Browse Prior Art Database

Or Array Reduction Technique

IP.com Disclosure Number: IPCOM000051288D
Original Publication Date: 1981-Jan-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Kraft, WR: AUTHOR [+4]

Abstract

When using program logic arrays (PLAs) as instruction decoders, many times the output of the OR array is the same for different instructions. With known PLAs, the AND array provides a product term for each different instruction decoded and each product term is provided to the OR array to cause identical outputs therefrom to occur. It would be better to build such PLAs without the duplication of information within the OR array.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 54% of the total text.

Page 1 of 2

Or Array Reduction Technique

When using program logic arrays (PLAs) as instruction decoders, many times the output of the OR array is the same for different instructions. With known PLAs, the AND array provides a product term for each different instruction decoded and each product term is provided to the OR array to cause identical outputs therefrom to occur. It would be better to build such PLAs without the duplication of information within the OR array.

Referring to Fig. 1, a conventional PLA includes an AND array 10 and an OR array 12. A code representing an instruction I is provided to AND array 10, and a product line P1(1) through P1(N) is provided from AND array 10. The number of product lines P1 is equal to the number of different instructions I which can be presented to AND array 10. In conventional PLAs, each of the P1 product lines are applied to OR array 12 which, in turn, provides an output T. For many of the P1 product terms, the output T is the same.

To reduce the number of product terms provided to OR array 12, gates 14 are placed between AND array 10 and OR array 12 for the purpose of channeling more than one product term P1 into the same OR term P2. The logical function required is the simple logical OR. Whenever N product terms P1 create the same output T from OR array 12, gates 14 logically OR these terms P1 together and provide a single product term P2 for provision to OR array 12. Thus, terms in the OR array need not be repeated.

Referring no...