Browse Prior Art Database

Flyback Converter System

IP.com Disclosure Number: IPCOM000051353D
Original Publication Date: 1981-Jan-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 3 page(s) / 51K

Publishing Venue

IBM

Related People

Rizzo, RP: AUTHOR

Abstract

In this power supply flyback converter system, unregulated input power Vin DC is obtained from AC source Vin AC, e.g., 115 volts - 60 Hz - single phase. Vin AC is rectified and filtered by full-wave bridge rectifier CR1-CR4 and capacitor filter network R1,C1. Vin DC is applied across the series-connected circuit elements of primary winding 1 of flyback transformer T1, collector-emitter circuit of NPN switching transistor Q4, and emitter resistor R32. Clamping circuit C10, R30, CR11 clamps the collector of transistor Q4 when Q4 is turning off.

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Flyback Converter System

In this power supply flyback converter system, unregulated input power Vin DC is obtained from AC source Vin AC, e.g., 115 volts - 60 Hz - single phase. Vin AC is rectified and filtered by full-wave bridge rectifier CR1-CR4 and capacitor filter network R1,C1. Vin DC is applied across the series-connected circuit elements of primary winding 1 of flyback transformer T1, collector-emitter circuit of NPN switching transistor Q4, and emitter resistor R32. Clamping circuit C10, R30, CR11 clamps the collector of transistor Q4 when Q4 is turning off.

The system converts the input voltage Vin DC into isolated regulated different multiple output DC voltages at the multi-tapped output winding 2 of transformer T1. A closed-loop pulse-width modulation (PWM) control circuit controls the frequency and duty cycle, i.e., ON/OFF times, of switching transistor Q4 to effect the regulation of the output voltages.

Driver: Transformer T1 has a feedback winding T1-A which is part of the control circuit. Portion 3-4 of winding T1-A develops base drive current for transistor Q4. Portion 4-5 senses the output of transformer T1 and is used in controlling the duty factor of transistor Q4. The polarity of winding T1-A is such that terminal 3 is positive during the turn-on and negative during the turn-off periods of the duty cycle. During system quiescence, transistor Q4 turns on and off and provides a triangular current waveform through emitter resistor R32. During the positive excursions of winding T1-A at terminal 3, transistors Q2 and Q3 are initially not conducting.

Just prior to the output at terminal 3 becoming positive, an initial trickle of current through resistors R2, R29 passes through resistor R27 to the base of transistor Q4, which in response thereto begins to conduct, i.e., turn-on. This causes, in turn, the voltage at terminal 3 to begin to go positive.

As the output at terminal 3 begins to go positive, it is applied through AC bypass capacitor C27 and resistor R21 substantially through base-coupling capacitor C8 to the base of transistor Q4. This action causes transistor Q4 to be rapidly driven into saturation. Current from primary winding 1 begins to produce the ramp of the triangular waveform-shaped current through resistor R32. The resultant ramp voltage is fed back to the inverted input (-) of comparator U1-B through filter R12, C5 which filters out the noise due to switching transitions of transistor Q4.

Concurrently, as terminal 3 is in its positive excursion, terminal 5 is negative and the voltage at terminals 4, 5 back biases rectifiers CR6, CR7, causing capacitor C2 to discharge slightly. The voltage across C2 is fed via resistor divider R4, R5, R6 to the inverted input (-) of comparator U1-A of an error amplifier stage. Comparator U1-A compares the divided feedback voltage with the reference voltage of Zener reference diode VR2 present at its non-inverting other input (+). comparator U1-A provides an output s...