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Efficient Storage for CRT Display having Alternate Display Modes

IP.com Disclosure Number: IPCOM000051421D
Original Publication Date: 1981-Jan-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Related People

Ringle, TW: AUTHOR [+2]

Abstract

This article describes a matrix pattern random-access storage interface between a CRT display and a driving system controlling the display of characters in a first mode of operation and dots and dashes representative of characters and words in a second mode of operation. Character font information is stored in a 5 by 7 array and double dotted to form a 10 by 14 display matrix. When operating in the second mode of operation, double dotting is effected horizontally only utilizing common circuitry.

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Efficient Storage for CRT Display having Alternate Display Modes

This article describes a matrix pattern random-access storage interface between a CRT display and a driving system controlling the display of characters in a first mode of operation and dots and dashes representative of characters and words in a second mode of operation. Character font information is stored in a 5 by 7 array and double dotted to form a 10 by 14 display matrix.

When operating in the second mode of operation, double dotting is effected horizontally only utilizing common circuitry.

In order to effect the double dotting display, a standard matrix type of interface is modified by adding control logic thereto.

The control logic includes register 11 and a divide by 2 circuit 13 located in the video control 15. Register 11 saves the starting address for each line of characters to be displayed as it is being accessed in the random-access memory (RAM) 17. The address counter 19 is reloaded with the previous address contained in register 11 at the end of the scan line. After completion of a second scan line repeating the contents of the first scan line, the address counter 19 is stepped to the start of the next scan line by the control unit 21 and the register 11 is loaded with the new starting line address.

The divide by 2 circuit 13 is used to cause every other one of the clock pulses to shift the shift register 23. This effects horizontal double dotting since the output position of the shif...