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Testing of Tri State Driver Circuits

IP.com Disclosure Number: IPCOM000051581D
Original Publication Date: 1981-Feb-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 3 page(s) / 73K

Publishing Venue

IBM

Related People

Schnurmann, HD: AUTHOR [+3]

Abstract

Tri-state drivers (TSDs) are well known circuits whose outputs may be one of three possible states: logic 1, logic 0, and "high impedance" states (Fig. 1). Fig. 1A is a truth table for the TSD of Fig. 1. These circuits are commonly used in conjunction with external signal receivers, and play an important role in facilitating communication between logic and memory within a system (Fig. 2). By setting the TSD in the high impedance state, a read/write operation may be Performed through the same data bus line, and data may be transmitted directly to the receiver without interference from the TSD.

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Testing of Tri State Driver Circuits

Tri-state drivers (TSDs) are well known circuits whose outputs may be one of three possible states: logic 1, logic 0, and "high impedance" states (Fig. 1). Fig. 1A is a truth table for the TSD of Fig. 1. These circuits are commonly used in conjunction with external signal receivers, and play an important role in facilitating communication between logic and memory within a system (Fig. 2). By setting the TSD in the high impedance state, a read/write operation may be Performed through the same data bus line, and data may be transmitted directly to the receiver without interference from the TSD.

Standard test pattern generators (TPGs) can only create patterns that detect faults when the circuit outputs are in a logic 0 or 1 state. Similarly, testers are designed to make measurements on the two logic states. Thus, neither the TPGs nor the tester are capable of testing TSDs in their high impedance state.

The Solution. This article introduces a method that permits the testing of TSDs in their high impedance state without modifying existing test equipment.

The method proposed calls for testing the TSD in two passes. In the first pass, the high impedance state of the TSD is assigned a "don't care state" (Fig.3) which enables the TPG program to generate patterns that will detect binary stuck fault conditions on the output of the TSD. In the second pass, another set of patterns is created to force the inputs of the TSD such that they will set the output of the TSD to a high impedance state. The output of the TSD in this state is assigned with either one or the other binary state to permit the tester to make an analog measurement. The output of the TSD is terminated with a resi...