Browse Prior Art Database

Motor Speed Control for a Typewriter

IP.com Disclosure Number: IPCOM000051607D
Original Publication Date: 1981-Feb-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 3 page(s) / 60K

Publishing Venue

IBM

Related People

Bethel, RK: AUTHOR [+4]

Abstract

A motor speed control that may be used to control the carrier speed of a typewriter detects pulses from an emitter connected to the carrier drive system and, using a series of logical tests, assigns a duty cycle for power applied to the motor that is based on the time between the most recent pulses. A duty cycle assignment operation is triggered by each occurrence of an emitter pulse and, once the motor speed is within a control range, limits are placed on the range of possible duty cycles in order to assure stable operation.

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Motor Speed Control for a Typewriter

A motor speed control that may be used to control the carrier speed of a typewriter detects pulses from an emitter connected to the carrier drive system and, using a series of logical tests, assigns a duty cycle for power applied to the motor that is based on the time between the most recent pulses. A duty cycle assignment operation is triggered by each occurrence of an emitter pulse and, once the motor speed is within a control range, limits are placed on the range of possible duty cycles in order to assure stable operation.

Referring to Fig. 1, a basic layout for a drive system includes a driven member 10, which may be the leadscrew of a typewriter. Speed is indicated by an encoder 12, such as an emitter wheel that cooperates with a light source- photocell pair. Pulses from the encoder 12 are supplied to a timer 14 that produces a digitally coded representation T(n) of the time elapsed between the two most recent pulses. Based on the time signal T(n), a logic unit 16, which is preferably a microprocessor, selects a duty cycle which is represented by a coded signal DC. Selection of a duty cycle is preferably accomplished using a series of logical tests (described below).

A pulse-width modulator 18 produces a high frequency signal having a duty cycle in accordance with the signal DC, and the signal from the modulator is applied to a motor controller 20 that supplies a corresponding level of DC power to a motor 22 that is coupled to the leadscrew 10.

Referring to Fig. 2, a preferred set of logic tests for implementing logic unit 16 includes initial tests to determine if the current elapsed time sample T(n) is outside of a control range having an upper speed limit T(UL) and a lower speed limit T(LL). (Note: T decreases as speed increases.) If the speed exceeds the upper limit, the signal DC is set to represent a...