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Fanning-Out Ohmic Contact: A Novel Process to Overcome the Problems associated with Contact Resistance

IP.com Disclosure Number: IPCOM000051687D
Original Publication Date: 1981-Feb-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Heiblum, M: AUTHOR [+5]

Abstract

A fan-out of the ohmic contact alleviates this problem by increasing t contact area without changing the device area. The device is illustrated above. A cross section is shown through a simple device with an ohmic contact. A sample device is fabricated by the following steps: On a conductive GaAs substrate 1, a buffer n/+/ layer 2 is grown. Then a thin layer 3 of lightly doped GaAs is grown, which is a simple example of a very low resistance device. A thin n layer 4 is grown on top (~2000 angstroms), and the device is removed from the growth chamber. Al(2)O(3) is deposited on top and etched to form a (5 mu)/2/ mesa. The sample is p/+/ doped Zn diffusion 5 to a depth of about 1 mu. The Al(2)O(3) mesa is removed, the surface is cleaned, and a 5 mu layer 6 of n/+/ - GaAs is grown.

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Fanning-Out Ohmic Contact: A Novel Process to Overcome the Problems associated with Contact Resistance

A fan-out of the ohmic contact alleviates this problem by increasing t contact area without changing the device area. The device is illustrated above. A cross section is shown through a simple device with an ohmic contact. A sample device is fabricated by the following steps:

On a conductive GaAs substrate 1, a buffer n/+/ layer 2 is grown.

Then a thin layer 3 of lightly doped GaAs is grown, which is a simple example of a very low resistance device.

A thin n layer 4 is grown on top (~2000 angstroms), and the device is removed from the growth chamber.

Al(2)O(3) is deposited on top and etched to form a (5 mu)/2/ mesa.

The sample is p/+/ doped Zn diffusion 5 to a depth of about 1 mu.

The Al(2)O(3) mesa is removed, the surface is cleaned, and a 5 mu layer 6 of n/+/ - GaAs is grown.

An ohmic contact 7 is formed on the top by depositing Au/Ge/Ni and alloying at 450 degrees C for 30 sec.

A mesa of (100 mu)/2/ is etched to an approximate depth of 7 mu.

When the structure is biased between contact 7 and another large area contact 8 at the bottom of the conductive substrate, most of the potential difference will be across layer 3. Current from the top electrode will be prevented from flowing through the p-type layer 5 due to two PN junctions, in series, at boundaries 1 and 2; one of them will be reverse biased under any applied voltage polarity. In this structure, the ohm...