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Microprocessor Control of High Frequency Switching Power Supplies

IP.com Disclosure Number: IPCOM000051709D
Original Publication Date: 1981-Mar-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 4 page(s) / 97K

Publishing Venue

IBM

Related People

Benedict, QL: AUTHOR [+4]

Abstract

A block diagram of the microprocessor control arrangement is shown in Fig. 1.

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Microprocessor Control of High Frequency Switching Power Supplies

A block diagram of the microprocessor control arrangement is shown in Fig.


1.

A microprocessor is used in conjunction with an analog-to-digital (A/D) converter 2, a multiplexer 3, a programmable timer 4, and a sample-and-hold circuit 5 as the central control element in a high frequency switching power supply environment to regulate one or more output voltages. Inputs from the power supply 10 are provided on lines 6-8 to the multiplexer 3, and control signals are supplied to the power supply via bus 9. In contrast with analog control of high frequency switching power supplies which is sometimes cumbersome and expensive microprocessors offer ease of control adaptability, and diagnostics capability.

The A/D converter 2 converts an analog control variable into a digital number which in turn is indexed into a table in the microprocessor to get the next required feedback value. This feedback value is then applied to the programmable timer 4 to control the power supply's regulation circuits. In conventional analog systems there must be separate circuits for regulation, overvoltage protection, undervoltage protection, and an ability to handle an overcurrent signal. The microprocessor control algorithm offers the ability to perform all these functions as an inherent part of the control function.

A flow chart illustrating the control sequence in block number sequence is shown in Fig. 2. The following characteristics and expressions are of interest: 1. Power on reset starts the algorithm here. 2. The following system variables are initialized: a) CUMAX: maximum number of algorithm iterations allowed for the supply to cycle up to operating voltage. b) FMAX: maximum number of times calibration will be attempted before an error is signaled. c) DEL: voltage delta allowed around the desired regulated voltage point d) FLAG: a temporary variable used for counting events. e) RMIN: minimum possible reference voltage measurement not considered an error. f) RMAX: maximum possible reference voltage measurement not considered an error. g) ALODC: allowable difference between any two adjacent voltage measurements during cycle up time. h) ALODR: allowable difference between any two adjacent voltage measurements during regulation time. i) OVMAX: maximum times the regulator should be allowed to attempt to correct an unexpected overvoltage condition. j) TEST: the present voltage measurement from the last A/D sample. 3. Set the pulse width to zero. 4. Connect the reference to the A/D converter and measure it. The result is stored in REF. 5. Make sure REF is reasonable and falls within expected boundaries. 6. Increment FLAG by one. 7. Retry the calibration task for FMAX times. 8. Signal an error message, and don't cycle the supply up. 9. Terminate the algorithm. 10. Reset FLAG to zero. 11. Save the present value of test for later. 12. Use TEST, the last sampled output from the A/D, to index into T...