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Dynamic Regulation Subroutine for a Microprocessor Controlled Switching Power Supply

IP.com Disclosure Number: IPCOM000051710D
Original Publication Date: 1981-Mar-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 3 page(s) / 51K

Publishing Venue

IBM

Related People

Ashley, CL: AUTHOR [+4]

Abstract

An assembly language subroutine is provided for a microprocessor which is regulating the voltage level of a switching power supply. The subroutine provides a simple and fast response digital method of regulating a switching power supply during dynamic and static load changes. The subroutine is useful in conjunction with a microprocessor-controlled power supply such as that described in the preceding article. The subroutine serves in a digital control system in a manner analogous to a linear control system where the pulse-width change is proportional to the error.

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Dynamic Regulation Subroutine for a Microprocessor Controlled Switching Power Supply

An assembly language subroutine is provided for a microprocessor which is regulating the voltage level of a switching power supply. The subroutine provides a simple and fast response digital method of regulating a switching power supply during dynamic and static load changes. The subroutine is useful in conjunction with a microprocessor-controlled power supply such as that described in the preceding article. The subroutine serves in a digital control system in a manner analogous to a linear control system where the pulse-width change is proportional to the error.

For a switching power supply a control pulse-width modulated signal regulates the output voltage level. The longer the pulse width is, the higher the output voltage V-Out level is, or: V-Out = V-In (T-On/T). where V-In is the unregulated power supply bulk voltage, T-On is the control pulse width, and T is the control pulse period.

During dynamic load changes, i.e., large load changes, 10 amperes, occurring over a 100-1 kilohertz range, the control logic must quickly react in varying degrees in order to converge on a regulated level.

The subroutine designated START is shown in the drawing and regulates the voltage level during dynamic, i.e., oscillator, load changes. The START subroutine does this by making the pulsewidth changes proportional to the error of the regulated value.

In the START subroutine, the pulse-width change is made equal to the error of V-Out (R1) from the regulated value (R0). Every logic cycle, the V-Out level is sampled by calling a DECS subroutine which returns the value to register R1. DECS is an analog-to-digital conversion routine. If the DECS subroutine is converting the analog V-Out level over a 0 to 7 volt range, then one-bit value of the 8-bit data word represents 7/256 or 27.3 millivolts. If the pulse width (R3) has 8 bits of resolution ov...