Browse Prior Art Database

Attached Processor

IP.com Disclosure Number: IPCOM000051749D
Original Publication Date: 1981-Mar-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 3 page(s) / 56K

Publishing Venue

IBM

Related People

Drimak, EG: AUTHOR [+3]

Abstract

In an attached processor system that allows each processor access to th channels, it is possible to have each processor attempt to use the same UCW (Unit Control Word). If this were allowed to happen, each processor would think that it had ownership of the channel device. The results would be unpredictable. The arrangement described herein prevents such occurrences.

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Attached Processor

In an attached processor system that allows each processor access to th channels, it is possible to have each processor attempt to use the same UCW (Unit Control Word). If this were allowed to happen, each processor would think that it had ownership of the channel device. The results would be unpredictable. The arrangement described herein prevents such occurrences.

When a Storage Word (Command) is issued and the processor is in a channel trap level, the processor will read from storage the UCW. At this time the busy bit in the UCW is sampled by the hardware to determine if the UCW is in use by the other processor. If this busy bit is not on, the memory is made busy to the other processor. This busy signal will lock out the other processor until the requesting processor updates the UCW and stores it back in memory. At this time the memory busy signal to the opposite side is reset, and it can access memory. When the UCW is accessed and the busy bit is on, no action is taken by the hardware, as the micro-code will now determine that the UCW is in use. It is the period of time between when the processor accesses the UCW and the micro-code can restore the UCW (busy bit on) that is being locked to the opposite side. It takes many machine cycles for the micro-code to make this determination.

When the Read Storage Command is received, a counter is started. This counter is set for an appropriate amount of time to allow the micro-code to operate on the...