Browse Prior Art Database

Current Mirror Transition Rate Limited Driver

IP.com Disclosure Number: IPCOM000051762D
Original Publication Date: 1981-Mar-01
Included in the Prior Art Database: 2005-Feb-10
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Boudon, GM: AUTHOR [+4]

Abstract

This interface circuit provides the capability to drive transmission lines or capacitive loads with defined transition rates in order to reduce adverse electrical effects. The output levels (V(out)) provided by this circuit are 0.5 V at 16 mA and Vc at 0 mA.

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Current Mirror Transition Rate Limited Driver

This interface circuit provides the capability to drive transmission lines or capacitive loads with defined transition rates in order to reduce adverse electrical effects. The output levels (V(out)) provided by this circuit are 0.5 V at 16 mA and Vc at 0 mA.

A Down level at the base of T1 allows Rd to provide drive current to the output pair T2, T3 connected in a current mirror configuration. In this mode, the current through T3 is given by the current in T2 multiplied by the ratio of the emitter areas of the devices. Since the current in T2 is determined by Vc and Rd, it is possible to limit the peak output current to any desired design limit. This in turn provides the ability to control the output transition rate.

An Up level at the base of T1 will shut off the output devices, allowing Vout to rise to Vc.

Schottky diodes SBD1 and SBD3 are included to prevent saturation of T1 and T3, respectively.

Resistor Rb serves to minimize the effect of V(BE) mismatching between T2 and T3, and hence to reduce the delay variation of the circuit.

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