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Use of Tristate Circuitry to Perform Logical Functions

IP.com Disclosure Number: IPCOM000051863D
Original Publication Date: 1981-Mar-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 2 page(s) / 46K

Publishing Venue

IBM

Related People

Dunn, EC: AUTHOR

Abstract

Various logic applications require switching of a number of functions onto a common line or bus. Figs. 1 and 2 illustrate common implementations of such applications.

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Use of Tristate Circuitry to Perform Logical Functions

Various logic applications require switching of a number of functions onto a common line or bus. Figs. 1 and 2 illustrate common implementations of such applications.

In Fig. 1, the number of inputs which the OR circuit is capable of receiving, and/or the physical space required by the OR circuitry may become a limiting factor. In the embodiment of Fig. 2, either the poor rise or fall times of the circuitry, or a technology dotting limitation may become limiting factors.

The implementation of Fig. 3 solves the above problems by utilizing circuitry that exhibits a tristate output. However, it requires that multiple functions not be gated onto the line or bus simultaneously. In the arrangement illustrated, the gating logic must have the capability of switching to the desired tristate output set forth in the table associated with the figure. The configuration utilizes driven rising and falling signal transitions, thereby reducing capacitive effects. It performs the same logical functions assuming non-overlapping gates. Less space is required than with configurations utilizing a combining logic block, and therefore no block delay or inversion is required.

The embodiment does require simultaneous switching and uses a high impedance state which must be accommodated by subsequent logic.

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