Browse Prior Art Database

Peripheral System Mode Controls

IP.com Disclosure Number: IPCOM000051864D
Original Publication Date: 1981-Mar-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 2 page(s) / 33K

Publishing Venue

IBM

Related People

Cary, CR: AUTHOR [+3]

Abstract

This article describes an arrangement in which hosts using a peripheral system have a plurality of devices connected by a control unit with a channel adapter connected to a channel of the host providing a plurality of functions indicated by other circuits OC. Circuits OC are connected to data flow circuit DF under control of a microcomputer. In many peripheral subsystems, a plurality of modes of operation can be employed, such as recording signals, reading signals, different data densities to be recorded, the extent of recording, the character of recording, and the like. For enhancing operations for a mode command, it is desirable to have a fast-acting channel adapter do a quick analysis before involving the microcomputer.

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Peripheral System Mode Controls

This article describes an arrangement in which hosts using a peripheral system have a plurality of devices connected by a control unit with a channel adapter connected to a channel of the host providing a plurality of functions indicated by other circuits OC. Circuits OC are connected to data flow circuit DF under control of a microcomputer. In many peripheral subsystems, a plurality of modes of operation can be employed, such as recording signals, reading signals, different data densities to be recorded, the extent of recording, the character of recording, and the like. For enhancing operations for a mode command, it is desirable to have a fast-acting channel adapter do a quick analysis before involving the microcomputer.

The arrangement is such that the channel adapter will activate the microcomputer for mode changes only when a received mode set command in the mode set register is different from the old mode set, as determined by compare circuits. When there is a difference, compare circuits supply an interrupt signal I to the microcomputer, indicating to the microcomputer that supervision of the subsystem requires attention because of the mode set change. At this time the new mode set is gated to a mode register of the control memory such that microprograms in the control memory can be executed by the microcomputer to implement the just received new mode signals from a host. Gates G2 and G3 enable the microcomputer to transfer...