Browse Prior Art Database

Stacked Thermally Enhanced High Package Density Module

IP.com Disclosure Number: IPCOM000051912D
Original Publication Date: 1981-Apr-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 2 page(s) / 26K

Publishing Venue

IBM

Related People

Marks, R: AUTHOR [+5]

Abstract

This article describes a stacked, thermally enhanced high density module. As shown in the figure a ceramic substrate 10 is provided which has a plurality of metal-filled vias 12 connected to metallized circuitry 14 on the lower side of the substrate.

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Stacked Thermally Enhanced High Package Density Module

This article describes a stacked, thermally enhanced high density module. As shown in the figure a ceramic substrate 10 is provided which has a plurality of metal-filled vias 12 connected to metallized circuitry 14 on the lower side of the substrate.

A pin carrier 16 is provided which mounts pins 18 which are arrayed to be aligned with the filled vias 12. The pins 18 are connected by soldering, as shown at 20, to the vias 12.

A heat conducting material 22 is mounted between the substrate 10 and carrier 16 and extends outwardly therefrom, and is adapted to be connected to a frame or other member to provide a large heat sink to dissipate heat from the module.

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