Browse Prior Art Database

Use of Extended Swaged Pins for Stacking

IP.com Disclosure Number: IPCOM000051914D
Original Publication Date: 1981-Apr-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 2 page(s) / 23K

Publishing Venue

IBM

Related People

DiCicco: AUTHOR [+3]

Abstract

This article describes the use of swaged pins in a stacked ceramic substrate module used to mount semiconductor chips. In the figure, a ceramic substrate 10 is shown which can mount one or more semiconductor chips (not shown) on the upper surface. The substrate 10 has metal-filled vias 12 each of which terminates in a junction end 14.

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Use of Extended Swaged Pins for Stacking

This article describes the use of swaged pins in a stacked ceramic substrate module used to mount semiconductor chips. In the figure, a ceramic substrate 10 is shown which can mount one or more semiconductor chips (not shown) on the upper surface. The substrate 10 has metal-filled vias 12 each of which terminates in a junction end 14.

A pin carrier 16 is provided which supports a plurality of pins 18, the pins being arrayed to be in alignment with the junction ends 14. The pins 16 are swaged, as shown at 20 and 22, on both sides of the carrier 16 so as to mount the pins securely in the carrier 16.

The pins 18 can be attached by conventional soldering techniques to the junction ends 14.

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