Browse Prior Art Database

Bus Attachable Loop Memory

IP.com Disclosure Number: IPCOM000051926D
Original Publication Date: 1981-Apr-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 2 page(s) / 41K

Publishing Venue

IBM

Related People

Nestork, WJ: AUTHOR

Abstract

This main memory storage system takes advantage of the processing capability of microprocessors and serial memory storage devices to perform memory housekeeping functions independently from a central processing unit (CPU). The memory controller includes input and output buffers which interface with a CPU or system channel and has system-independent control and addressing logic for the storage of data in main storage.

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Bus Attachable Loop Memory

This main memory storage system takes advantage of the processing capability of microprocessors and serial memory storage devices to perform memory housekeeping functions independently from a central processing unit (CPU). The memory controller includes input and output buffers which interface with a CPU or system channel and has system-independent control and addressing logic for the storage of data in main storage.

In most memory applications data stored in a main memory is assigned an address by the CPU which is used by a storage controller to store and access data. This technique requires considerable amounts of logic circuitry throughout the memory system down to the memory array chip level. The opposite extreme is to place data directly in a bulk memory, such as a file, and not sort (select required segments) until the data is placed in the CPU read/write memory.

This bus-attachable loop memory takes advantages of semiconductor technology, such as charge-coupled devices (CCDs), in which data is stored serially in loops and then retrieved in whole or as presorted information. The use of a microprocessor to provide distributed intelligence allows the memory system to sort data independently from the CPU, thus leaving the CPU free for other tasks.

Data to be stored is placed by the CPU or channel controller on a system bus and is initially stored in one or more receiving loops AI, ..., Ax, after being given a tag identifier by the St...