Browse Prior Art Database

High Voltage MOSFET Structure

IP.com Disclosure Number: IPCOM000051990D
Original Publication Date: 1981-Apr-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Jambotkar, CG: AUTHOR [+2]

Abstract

A method is described for improving the drain junction bulk breakdown voltage of MOSFETs without sacrificing density. The method consists of introducing directly below the drain regions isolated, floating regions, "A", doped with the same impurity type as the drain. The distance d is, by design, such that when the drain-to-substrate junction is reverse-biased, the depletion region extends to the region "A". The typical value of d is about 0.5 - 1.5 micrometers.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 82% of the total text.

Page 1 of 2

High Voltage MOSFET Structure

A method is described for improving the drain junction bulk breakdown voltage of MOSFETs without sacrificing density. The method consists of introducing directly below the drain regions isolated, floating regions, "A", doped with the same impurity type as the drain. The distance d is, by design, such that when the drain-to-substrate junction is reverse-biased, the depletion region extends to the region "A". The typical value of d is about 0.5 - 1.5 micrometers.

The region "A" may be realized by deep implantation of suitable ions through the same windows as ones opened for formation of source and drain regions. In this case an implantation (not shown) will be provided under the source also. In either case it is preferred that the chip fabrication process be designed such that the implanted "A" regions are formed subsequent to most high-temperature processing; this is to minimize substantial diffusion of the "A" region impurities.

Alternatively, the "A" regions may be partially formed through implantation or conventional high-temperature doping in the substrate, which is followed by epitaxial growth of about 2 - 3 micrometer-thick silicon film. FETs are formed in the epitaxial film such that drains are located directly above the "A" regions. During various heat cycles, the "A" regions outdiffuse to assume a desired final form.

The above method is directed to improving the drain junction breakdown in circuit applications wherein, becaus...