Browse Prior Art Database

Head Failure Detector For A Magnetic Head

IP.com Disclosure Number: IPCOM000052073D
Original Publication Date: 1981-Apr-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 3 page(s) / 38K

Publishing Venue

IBM

Related People

Bailey, JA: AUTHOR [+5]

Abstract

In magnetic recording it is difficult to pinpoint failing elements in the recording channels. For example, when there is no readback signal, it is not obvious which portion, i.e., the write or read portion, of a recording channel failed.

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Head Failure Detector For A Magnetic Head

In magnetic recording it is difficult to pinpoint failing elements in the recording channels. For example, when there is no readback signal, it is not obvious which portion, i.e., the write or read portion, of a recording channel failed.

Consequently, to separate read failures from write failures, complicated test procedures are presently employed. For example, one technique involves reading a prewritten tape and another the use of a "loop write to read" method. In the "loop write to read" method, write data from the control unit is fed directly into the read channel and therefore write electronics, the write-read head and the tape are bypassed. With the improved technique described herein, a detector pinpoints write head package failures, saving time for the field engineer in troubleshooting and testing.

The figure shows a write driver and head failure detector (HFD) according to the present invention. Transistors Q1, Q2, Q3 and Q4 form an "H" write driver. The rest of the components constitute predrivers and HFD as follows: R1, D1, T1 - Predriver 1 for driving Q1 R2, D2, T2 - Predriver 2 for driving Q2 R3, R30, D30, D31, D32, D33, T3 - Predriver 3 for driving Q3 R4, R40, D40, D41, D42, D43, T4 - Predriver 4 for driving Q4 R5, R6, R7, TS, T6 /-/ Head failure detector I - Current source; in normal operation, source of write current.

The predrivers are driven by standard open collector transistor-transistor logic (TTL) gates, which are, for the sake of simplicity, omitted in the figure. Instead, inputs to predrivers 2 and 3 (IN2 and IN3) are shown shorted to ground, while inputs to predrivers 1 and 4 (IN1 IN4) are open. Let us consider two possible conditions: one when the write head is conducting, and the second when the write head path is open. Case #1.

Transistors Q1 and Q4 are ON, and Q2 and Q3 are OFF. Write current flows through Q1, the head (from X to Y) through Q4 a...