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Hardware Address Relocation For Variable Length Segments

IP.com Disclosure Number: IPCOM000052086D
Original Publication Date: 1981-Apr-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 2 page(s) / 13K

Publishing Venue

IBM

Related People

Maddock, RF: AUTHOR [+4]

Abstract

Dynamic storage relocation is applied to variable length data in a computing engine instead of, as is more usual, to the fixed blocks or pages. Specifically, a number of hardware registers are provided to store real addresses of selected data or procedure segments if they are in working store, or segment identifiers if they are elsewhere. The selected segments in working store are provided with address backpointers in their headers identifying the associated address register. The contents of the address registers are dynamically updated so that they always contain the address of the associated segments, even though the segment may be moved about in working store.

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Hardware Address Relocation For Variable Length Segments

Dynamic storage relocation is applied to variable length data in a computing engine instead of, as is more usual, to the fixed blocks or pages. Specifically, a number of hardware registers are provided to store real addresses of selected data or procedure segments if they are in working store, or segment identifiers if they are elsewhere. The selected segments in working store are provided with address backpointers in their headers identifying the associated address register. The contents of the address registers are dynamically updated so that they always contain the address of the associated segments, even though the segment may be moved about in working store.

A uni-programmed engine (for example, a microprocessor-controlled single display terminal) often has computer power to spare which can be employed to run a programmed relocation scheme to enable the engine to operate on variable length records (segments) rather than on fixed blocks or pages. The engine is programmed to collect together fragmented pieces of storage by using its spare compute cycles to move segments in its working store, in this case RAM (random-access memory). While this scheme makes good use of storage, its disadvantage is that the addresses of programs and data are continually changing so each reference to a segment in storage requires a sequential search of RAM for segment identifiers, and this is time consuming.

The subject hardware relocation system allows the engine to translate virtual addresses into real addresses at memory access time, while still supporting variable length segments with unpredictable movement of segments in memory. The system is implemented by the provision of a number of segment address registers (locators) in fixed location in RAM. Each segment locator can hold either the real address of a segment, if that segment is in the engin...